the aip74lvc2g17 provides two non-inverting buffers with schmitt trigger input. it is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.
inputs can be driven from either 3.3v or 5v devices. this feature allows the use of these devices as translators in a mixed 3.3v and 5v environment.
this device is fully specified for partial power-down applications using ioff.
the ioff circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
wide supply voltage range from 1.65v to 5.5v
5v tolerant inputs for interfacing with 5v logic
±24ma output drive (vcc=3.0v)
cmos low power consumption
latch-up performance exceeds 250ma
direct interface with ttl levels
specified from -40℃ to 105℃
packaging information: sot-23-6/sot-363