the aip74avch2t45 is a dual bit, dual supply transceiver that enables bidirectional level translation. it features two data input-output ports (na and nb), a direction control input(dir) and dual supply pins (vcc(a) and vcc(b)). both vcc(a) and vcc(b) can be supplied at any voltage between 0.8v and 3.6v making the device suitable for translating between any of the low voltage nodes (0.8v, 1.2v, 1.5v, 1.8v, 2.5v and 3.3v). pins na and dir are referenced to vcc(a) and pins nb are referenced to vcc(b). a high on dir allows transmission from na to nb and a low on dir allows transmission from nb to na.
the device is fully specified for partial power-down applications using ioff. the ioff circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. in suspend mode when either vcc(a) or vcc(b) are at gnd level, both a and b are in the high-impedance off-state.
the aip74avch2t45 has active bus hold circuitry which is provided to hold unused or floating data inputs at a valid logic level. this feature eliminates the need for external pull-up or pull-down resistors.
wide supply voltage range:
vcc(a): 0.8v to 3.6v
vcc(b): 0.8v to 3.6v
maximum data rates:
500mbps (1.8v to 3.3v translation)
320mbps (<1.8v to 3.3v translation)
320mbps (translate to 2.5v or 1.8v)
280mbps (translate to 1.5v)
240mbps (translate to 1.2v)
bus hold on data inputs
inputs accept voltages up to 3.6v
ioff circuitry provides partial power-down mode operation
specified from -40℃ to 105℃
packaging information: tssop8/vssop8