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aip74hc/hct373
octal d-type transparent latch; 3-state

the aip74hc/hct373 is an octal d-type transparent latch with 3-state outputs. the device features latch enable (le) and output enable (oe()) inputs. when le is high, data at the inputs enter the latches. in this condition the latches are transparent, a latch output will change each time its corresponding d-input changes. when le is low the latches store the information that was present at the inputs a set-up time preceding the high-to-low transition of le. a high onoe() causes the outputs to assume a high-impedance off-state. operation of theoe() input does not affect the state of the latches. inputs include clamp diodes. this enables the use of current limiting resistors to interface inputs to voltages in excess of vcc.


  • main features product

  • product documents

  • input levels:

    for aip74hc373: cmos level

    for aip74hct373: ttl level

  • 3-state non-inverting outputs for bus-oriented applications

  • common 3-state output enable input

  • functionally identical to the aip74hc/hct563 and aip74hc/hct573

  • specified from -40℃ to 105℃

  • packaging information: dip20/sop20/tssop20


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