the aip74lv4052 is a low-voltage cmos device and is pin and function compatible with the aip74hc/hct4052.
the aip74lv4052 is a dual 4-channel analog multiplexer/demultiplexer with a common select logic. each multiplexer has four independent inputs/outputs (ny0 to ny3) and a common input/output (nz). the common channel select logics include two digital select inputs (s0 and s1) and an active low enable input (e). withe low, one of the four switches is selected (low impedance on-state) by s0 and s1. withe high, all switches are in the high impedance off-state, independent of s0 and s1. vcc and gnd are the supply voltage pins for the digital control inputs (s0, s1 ande). the vcc to gnd ranges are 1.0v to 6.0v. the analog inputs/outputs (ny0, to ny3, and nz) can swing between vcc as a positive limit and vee as a negative limit. vcc-vee may not exceed 6.0v. for operation as a digital multiplexer/demultiplexer, vee is connected to gnd (typically ground).
optimized for low-voltage applications: 1.0v to 6.0v
accepts ttl input levels between vcc=2.7v and vcc=3.6v
low on resistance:
145ω (typical) at vcc-vee=2.0v
90ω (typical) at vcc-vee=3.0v
60ω (typical) at vcc-vee=4.5v
logic level translation: to enable 3v logic to communicate with ±3v analog signals
typical ‘break before make’ built in
specified from -40℃ to 105℃
packaging information: dip16/sop16/tssop16